1. Field of Invention
The present invention relates to a photolithographic method. More particularly, the present invention relates to a method of reducing a critical dimension of a patterned photoresist layer during the manufacturing of integrated circuits.
2. Description of Related Art
Due to the rapid development of integrated circuit fabricating techniques, dimensions of individual semiconductor devices have become smaller so that more devices are integrated into a single silicon chip. However, miniaturization of a semiconductor device depends very much on controlling critical dimensions in photolithography.
Raising the line width resolution in a photolithographic operation beyond 0.18 xcexcm in the current state of technology is rather difficult unless a light source having a shorter wavelength is used, along with a short wavelength photoresist. Reducing wavelength of light source, however, means that old machines have to be entirely replaced by new, costly machines.
The present invention provides a method of lowering the critical dimensions of a semiconductor device without needing to replace existing manufacturing equipment.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of reducing a critical dimension of a patterned photoresist layer, which is suitable for a substrate having a patterned photoresist layer formed thereon. In the method, the patterned photoresist layer is baked at a first temperature, wherein the first temperature is higher enough to make the patterned photoresist layer expand laterally. The patterned photoresist layer is then baked at a second temperature to make the patterned photoresist layer expand laterally at a fixed rate.
The first temperature is greater than a melting point or a glass transition temperature of the patterned photoresist layer.
If the patterned photoresist layer is made of a deep-UV material and the patterned photoresist layer is used as a deep ultraviolet photoresist, the patterned photoresist layer is baked at the first temperatures of about 145xc2x0 C. for 90 seconds.
If the patterned photoresist layer is made of a deep-UV material and the patterned photoresist layer is used as a deep ultraviolet photoresist, the patterned photoresist layer is baked at the second temperature of about 161xc2x0 C. for 70 seconds.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of reducing a critical dimension of a patterned photoresist layer, which is suitable for a substrate having a film layer and a patterned photoresist layer sequentially formed thereon. A plurality of first openings are formed in the patterned photoresist layer. In the method, the patterned photoresist layer is baked at a first temperature. The first temperature is higher enough to make the patterned photoresist layer expand laterally. Then, the patterned photoresist layer is baked at a second temperature to make the patterned photoresist layer expand laterally at a linear rate, so that widths of the first openings are reduced at the linear rate to a desired dimension. The film layer is etched to form a plurality of second openings while using the photoresist layer as a mask.
The first temperature is greater than a melting point or a glass transition temperature of the patterned photoresist layer.
If the patterned photoresist layer is made of a deep-UV material and the patterned photoresist layer is used as a deep ultraviolet photoresist, the patterned photoresist layer is baked at the first temperature of about 145xc2x0 C. for 90 seconds.
If the patterned photoresist layer is made of a deep-UV material and the patterned photoresist layer is used as a deep ultraviolet photoresist, the patterned photoresist layer is baked at the second temperature of about 161xc2x0 C. for 70 seconds.
According to the method of this invention, the second openings can be narrowed to a critical dimension of around 80nm without needing to purchase additional equipment. Moreover, temperature used in the second baking can be adjusted to control the reduction rate of the first opening in the photoresist layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.